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Semiconductor Electronics

JEE Main 2026 (Online) 5th April Evening ShiftMCQMedium📈 Topic in 2% papers+4−1
Ques. 1JEE Main 2026, 5 April (Evening Shift)

In a semiconductor p-n diode, the doping concentrations on p-side and n-side are 1015 atoms/cm3 and 1018 atoms/cm3, respectively. Which one of the following statements is true ?

  1. Widths of depletion region on either side of the interface are equal
  2. The depletion region width is more on p-side compared to that in n-side
  3. The depletion region width is more on n-side compared to that in p-side
  4. No depletion region forms because of unequal doping concentrations on p and n-sides

Answer

(2) The depletion region width is more on p-side compared to that in n-side

Solution

The depletion region as a whole is neutral, so NAxp = NDxn and

xpxn = NDNA = 10181015 = 103

Hence the depletion region spreads much more into the lightly doped p-side.

A depletion region always forms at a p-n junction, whatever the doping, so (4) is wrong.

The depletion region width is more on p-side.

Answer: (2)

Keep practising — Semiconductor Electronics

Ques. 2JEE Main 2026, 4 April (Morning Shift)

Two 4 bits binary numbers, A = 1101 and B = 1010 are given in the inputs of a logic circuit shown in figure below. The output (Y) will be : [figure]

  1. Y = 1101
  2. Y = 0010
  3. Y = 0111
  4. Y = 1000
Ques. 3JEE Main 2026, 4 April (Morning Shift)

Consider a circuit consisting of a capacitor (20 μF), resistor (100 Ω) and two identical diodes as shown in figure. The resistance of diode under forward biasing condition is 10 Ω. The time constant of the circuit is 10-3 s. The value of is . [figure]

  1. 2.2
  2. 2.0
  3. 2.1
  4. 2.4
Ques. 4JEE Main 2026, 4 April (Evening Shift)

Given below are two statements: one is labelled as Assertion (A) and the other is labelled as Reason (R). Choose the correct answer from the options given below :

  1. Both (A) and (R) are true and (R) is the correct explanation of (A)
  2. Both (A) and (R) are true but (R) is NOT the correct explanation of (A)
  3. (A) is true but (R) is false
  4. (A) is false but (R) is true
Ques. 5JEE Main 2026, 4 April (Evening Shift)

A diode has Zener voltage of 10 V and maximum power dissipation of 0.5 W, then the minimum resistance to be used in series with this diode for safety when it is connected to a 25 V power supply is Ω.

Ques. 6JEE Main 2026, 2 April (Morning Shift)

For the given circuit (shown in part (A)) the time dependent input voltage vin(t) and corresponding output vo(t) are shown in part (B) and part (C), respectively. Identify the components that are used in the circuit between points X and Y. [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 7JEE Main 2026, 2 April (Evening Shift)

If X and Y are the inputs, the given circuit works as . [figure]

  1. OR gate
  2. AND gate
  3. NAND gate
  4. NOR gate
Ques. 8JEE Main 2026, 28 January (Morning Shift)

Assuming in forward bias condition there is a voltage drop of 0.7 V across a silicon diode, the current through diode D1 in the circuit is mA. (Assume all diodes in the given circuit are identical) [figure]

  1. 17.6
  2. 18.8
  3. 20.15
  4. 11.7
Ques. 9JEE Main 2026, 28 January (Evening Shift)

Two p-n junction diodes D1 and D2 are connected as shown in figure. A and B are input signals and C is the output. The given circuit will function as a . [figure]

  1. AND Gate
  2. OR Gate
  3. NOR Gate
  4. NAND Gate
Ques. 10JEE Main 2026, 24 January (Morning Shift)

A voltage regulating circuit consisting of Zener diode, having breakdown voltage of 10 V and maximum power dissipation of 0.4 W, is operated at 15 V. The approximate value of protective resistance in this circuit is .

Ques. 11JEE Main 2026, 24 January (Evening Shift)

Identify the correct truth table of the given logic circuit. [figure]

  1. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  2. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  3. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  4. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array

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