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Semiconductor Electronics

Previous year questions with solutions · 2025 – 2026

39Questions
37Papers covered
4.42%Weightage 2026▲ 16.7% vs last year
Year-wise statistics questions · papers · average per paper · weightage
YearQuestionsPapersAvg / paperWeightage
202621191.14.42% ▲ 16.7% vs last year
202518190.953.79%

21 questions · newest paper first

Ques. 1JEE Main 2026, 8 April (Evening Shift)

The output Y for the given inputs A and B to the circuit is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 2JEE Main 2026, 6 April (Evening Shift)

Refer to the logic circuit given below. For two inputs (A=1, B=1) and (A=0, B=1), output (Y) will be . [figure]

  1. 1, 0 respectively
  2. 0, 1 respectively
  3. 0, 0 respectively
  4. 1, 1 respectively
Ques. 3JEE Main 2026, 5 April (Morning Shift)

For the given logic circuit, which of the following inputs combination will make both LED-1 and LED-2 to glow? [figure]

  1. A = 0, B = 1, C = 1
  2. A = 1, B = 0, C = 0
  3. A = 1, B = 0, C = 1
  4. A = 1, B = 1, C = 0
Ques. 4JEE Main 2026, 4 April (Morning Shift)

Two 4 bits binary numbers, A = 1101 and B = 1010 are given in the inputs of a logic circuit shown in figure below. The output (Y) will be : [figure]

  1. Y = 1101
  2. Y = 0010
  3. Y = 0111
  4. Y = 1000
Ques. 5JEE Main 2026, 2 April (Evening Shift)

If X and Y are the inputs, the given circuit works as . [figure]

  1. OR gate
  2. AND gate
  3. NAND gate
  4. NOR gate
Ques. 6JEE Main 2026, 28 January (Evening Shift)

Two p-n junction diodes D1 and D2 are connected as shown in figure. A and B are input signals and C is the output. The given circuit will function as a . [figure]

  1. AND Gate
  2. OR Gate
  3. NOR Gate
  4. NAND Gate
Ques. 7JEE Main 2026, 24 January (Evening Shift)

Identify the correct truth table of the given logic circuit. [figure]

  1. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  2. arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  3. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array
  4. arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
Ques. 8JEE Main 2026, 23 January (Evening Shift)

For the given logic gate circuit, which of the following is the correct truth table? [figure]

  1. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 array
  2. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 0 & 0 array
  3. arrayccc n & m & z \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 1 array
  4. arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 0 \ 1 & 0 & 0 array
Ques. 9JEE Main 2026, 22 January (Morning Shift)

Find the correct combination of A, B, C and D inputs which can cause the LED to glow. [figure]

  1. 1000
  2. 0011
  3. 0100
  4. 1101
Ques. 10JEE Main 2026, 22 January (Evening Shift)

The correct truth table for the given input data of the following logic gate is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 11JEE Main 2026, 21 January (Morning Shift)

The given circuit works as : [figure]

  1. NOR gate
  2. OR gate
  3. AND gate
  4. NAND gate
Ques. 12JEE Main 2025, 7 April (Evening Shift)

Consider the following logic circuit. [figure] The output is Y = 0 when :

  1. A = 1 and B = 0
  2. A = 0 and B = 0
  3. A = 1 and B = 1
  4. A = 0 and B = 1
Ques. 13JEE Main 2025, 4 April (Morning Shift)

The Boolean expression Y = A BC + A C can be realised with which of the following gate configurations. Choose the correct answer from the options given below:

  1. B, C Only
  2. A, B, C Only
  3. A, B Only
  4. A, C Only
Ques. 14JEE Main 2025, 3 April (Morning Shift)

Choose the correct logic circuit for the given truth table having inputs A and B. [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 15JEE Main 2025, 3 April (Evening Shift)

The truth table corresponding to the circuit given below is: [figure]

  1. arrayccc A & B & C \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 1 array
  2. arrayccc A & B & C \ 0 & 0 & 1 \ 1 & 0 & 0 \ 0 & 1 & 0 \ 1 & 1 & 0 array
  3. arrayccc A & B & C \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 0 \ 1 & 1 & 0 array
  4. arrayccc A & B & C \ 0 & 0 & 0 \ 1 & 0 & 0 \ 0 & 1 & 0 \ 1 & 1 & 1 array
Ques. 16JEE Main 2025, 2 April (Evening Shift)

In the digital circuit shown in the figure, for the given inputs the P and Q values are : [figure]

  1. P = 0, Q = 1
  2. P = 1, Q = 0
  3. P = 0, Q = 0
  4. P = 1, Q = 1
Ques. 17JEE Main 2025, 29 January (Morning Shift)

[figure] For the circuit shown above, equivalent GATE is :

  1. NOT gate
  2. NAND gate
  3. AND gate
  4. OR gate
Ques. 18JEE Main 2025, 29 January (Evening Shift)

The truth table for the circuit given below is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 19JEE Main 2025, 28 January (Morning Shift)

Which of the following circuits has the same output as that of the given circuit? [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 20JEE Main 2025, 24 January (Evening Shift)

The output of the circuit is low (zero) for : [figure] Choose the correct answer from the options given below :

  1. (A), (B) and (C) only
  2. (A), (C) and (D) only
  3. (B), (C) and (D) only
  4. (A), (B) and (D) only
Ques. 21JEE Main 2025, 22 January (Evening Shift)

[figure] To obtain the given truth table, following logic gate should be placed at G :

  1. NOR Gate
  2. OR Gate
  3. AND Gate
  4. NAND Gate