Semiconductor Electronics
Previous year questions with solutions · 2025 – 2026
39 Questions
37 Papers covered
4.42% Weightage 2026 ▲ 16.7% vs last year
Year-wise statistics questions · papers · average per paper · weightage Year Questions Papers Avg / paper Weightage 2026 21 19 1.1 4.42% ▲ 16.7% vs last year 2025 18 19 0.95 3.79%
All 39 MCQ 37 Numerical 2
Topic All topics Diode as a Rectifier (Half-wave and Full-wave) Intrinsic and Extrinsic Semiconductors Logic Gates (OR, AND, NOT, NAND, NOR) Semiconductor Diode: Forward and Reverse Bias, V–I Characteristics Special Purpose Diodes: Zener Diode, LED, Photodiode, Solar Cell p–n Junction Formation Year All years 2026 2025
Ques. 1 JEE Main 2026, 8 April (Evening Shift)
The output Y for the given inputs A and B to the circuit is : [figure]
[figure] [figure] [figure] [figure]
Ques. 2 JEE Main 2026, 6 April (Evening Shift)
Refer to the logic circuit given below. For two inputs (A=1, B=1) and (A=0, B=1), output (Y) will be . [figure]
1, 0 respectively 0, 1 respectively 0, 0 respectively 1, 1 respectively
Ques. 3 JEE Main 2026, 5 April (Morning Shift)
For the given logic circuit, which of the following inputs combination will make both LED-1 and LED-2 to glow? [figure]
A = 0, B = 1, C = 1 A = 1, B = 0, C = 0 A = 1, B = 0, C = 1 A = 1, B = 1, C = 0
Ques. 4 JEE Main 2026, 4 April (Morning Shift)
Two 4 bits binary numbers, A = 1101 and B = 1010 are given in the inputs of a logic circuit shown in figure below. The output (Y) will be : [figure]
Y = 1101 Y = 0010 Y = 0111 Y = 1000
Ques. 5 JEE Main 2026, 2 April (Evening Shift)
If X and Y are the inputs, the given circuit works as . [figure]
OR gate AND gate NAND gate NOR gate
Ques. 6 JEE Main 2026, 28 January (Evening Shift)
Two p-n junction diodes D1 and D2 are connected as shown in figure. A and B are input signals and C is the output. The given circuit will function as a . [figure]
AND Gate OR Gate NOR Gate NAND Gate
Ques. 7 JEE Main 2026, 24 January (Evening Shift)
Identify the correct truth table of the given logic circuit. [figure]
arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array arrayccc A & B & Y \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 0 & 1 \ 1 & 1 & 0 array arrayccc A & B & Y \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 0 array
Ques. 8 JEE Main 2026, 23 January (Evening Shift)
For the given logic gate circuit, which of the following is the correct truth table? [figure]
arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 0 array arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 1 \ 1 & 0 & 0 array arrayccc n & m & z \ 0 & 0 & 0 \ 0 & 1 & 1 \ 1 & 1 & 0 \ 1 & 0 & 1 array arrayccc n & m & z \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 1 & 0 \ 1 & 0 & 0 array
Ques. 9 JEE Main 2026, 22 January (Morning Shift)
Find the correct combination of A, B, C and D inputs which can cause the LED to glow. [figure]
1000 0011 0100 1101
Ques. 10 JEE Main 2026, 22 January (Evening Shift)
The correct truth table for the given input data of the following logic gate is : [figure]
[figure] [figure] [figure] [figure]
Ques. 11 JEE Main 2026, 21 January (Morning Shift)
The given circuit works as : [figure]
NOR gate OR gate AND gate NAND gate
Ques. 12 JEE Main 2025, 7 April (Evening Shift)
Consider the following logic circuit. [figure] The output is Y = 0 when :
A = 1 and B = 0 A = 0 and B = 0 A = 1 and B = 1 A = 0 and B = 1
Ques. 13 JEE Main 2025, 4 April (Morning Shift)
The Boolean expression Y = A BC + A C can be realised with which of the following gate configurations. Choose the correct answer from the options given below:
B, C Only A, B, C Only A, B Only A, C Only
Ques. 14 JEE Main 2025, 3 April (Morning Shift)
Choose the correct logic circuit for the given truth table having inputs A and B. [figure]
[figure] [figure] [figure] [figure]
Ques. 15 JEE Main 2025, 3 April (Evening Shift)
The truth table corresponding to the circuit given below is: [figure]
arrayccc A & B & C \ 0 & 0 & 0 \ 0 & 1 & 0 \ 1 & 0 & 1 \ 1 & 1 & 1 array arrayccc A & B & C \ 0 & 0 & 1 \ 1 & 0 & 0 \ 0 & 1 & 0 \ 1 & 1 & 0 array arrayccc A & B & C \ 0 & 0 & 1 \ 0 & 1 & 0 \ 1 & 0 & 0 \ 1 & 1 & 0 array arrayccc A & B & C \ 0 & 0 & 0 \ 1 & 0 & 0 \ 0 & 1 & 0 \ 1 & 1 & 1 array
Ques. 16 JEE Main 2025, 2 April (Evening Shift)
In the digital circuit shown in the figure, for the given inputs the P and Q values are : [figure]
P = 0, Q = 1 P = 1, Q = 0 P = 0, Q = 0 P = 1, Q = 1
Ques. 17 JEE Main 2025, 29 January (Morning Shift)
[figure] For the circuit shown above, equivalent GATE is :
NOT gate NAND gate AND gate OR gate
Ques. 18 JEE Main 2025, 29 January (Evening Shift)
The truth table for the circuit given below is : [figure]
[figure] [figure] [figure] [figure]
Ques. 19 JEE Main 2025, 28 January (Morning Shift)
Which of the following circuits has the same output as that of the given circuit? [figure]
[figure] [figure] [figure] [figure]
Ques. 20 JEE Main 2025, 24 January (Evening Shift)
The output of the circuit is low (zero) for : [figure] Choose the correct answer from the options given below :
(A), (B) and (C) only (A), (C) and (D) only (B), (C) and (D) only (A), (B) and (D) only
Ques. 21 JEE Main 2025, 22 January (Evening Shift)
[figure] To obtain the given truth table, following logic gate should be placed at G :
NOR Gate OR Gate AND Gate NAND Gate