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Semiconductor Electronics

JEE Main 2024 (Online) 8th April Morning ShiftMCQMedium📈 Topic in 53% papers+4−1
Ques. 1JEE Main 2024, 8 April (Morning Shift)

The output Y of following circuit for given inputs is : [figure]

  1. A B
  2. A B
  3. A B(A + B)
  4. 0

Answer

(4) 0

Solution

[figure]

The OR gate gets A and B, so it gives A + B; the lower AND gate gets A and B, so it gives A B. The last AND gate gives Y = (A + B) AB.

Truth table:

array|c|c|c|c|c| A & B & A + B & A B & Y \ 0 & 0 & 1 & 0 & 0 \ 0 & 1 & 0 & 1 & 0 \ 1 & 0 & 1 & 0 & 0 \ 1 & 1 & 1 & 0 & 0 \ array

Whenever one input of the last AND gate is 1 the other is 0, so Y = 0 for every input.

(1): A B = 1 for A = B = 1, so (1) is wrong

(2): A B = 1 for A = 0, B = 1, so (2) is wrong

(3): A B(A + B) = 1 for A = B = 1, so (3) is wrong

Answer: (4)

Keep practising — Semiconductor Electronics

Ques. 2JEE Main 2024, 8 April (Evening Shift)

A potential divider circuit is connected with a dc source of 20 V, a light emitting diode of glow in voltage 1.8 V and a zener diode of breakdown voltage of 3.2 V. The length (PR) of the resistive wire is 20 cm. The minimum length of PQ to just glow the LED is cm. [figure]

Ques. 3JEE Main 2024, 6 April (Morning Shift)

The correct truth table for the following logic circuit is : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 4JEE Main 2024, 6 April (Evening Shift)

The acceptor level of a p-type semiconductor is 6 eV. The maximum wavelength of light which can create a hole would be : Given hc = 1242 eV nm.

  1. 407 nm
  2. 103.5 nm
  3. 414 nm
  4. 207 nm
Ques. 5JEE Main 2024, 5 April (Morning Shift)

Following gates section is connected in a complete suitable circuit. [figure] For which of the following combination, bulb will glow (ON) :

  1. A = 1, B = 1, C = 1, D = 0
  2. A = 1, B = 0, C = 0, D = 0
  3. A = 0, B = 0, C = 0, D = 1
  4. A = 0, B = 1, C = 1, D = 1
Ques. 6JEE Main 2024, 5 April (Evening Shift)

The output (Y) of logic circuit given below is 0 only when : [figure]

  1. A = 0, B = 0
  2. A = 0, B = 1
  3. A = 1, B = 0
  4. A = 1, B = 1
Ques. 7JEE Main 2024, 4 April (Morning Shift)

The value of net resistance of the network as shown in the given figure is : [figure]

  1. ( 3011 )
  2. 6
  3. ( 52 )
  4. ( 154 )
Ques. 8JEE Main 2024, 4 April (Evening Shift)

Which of the diode circuits shows correct biasing used for the measurement of dynamic resistance of p-n junction diode :

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]
Ques. 9JEE Main 2024, 4 April (Evening Shift)

Identify the logic gate given in the circuit : [figure]

  1. OR gate
  2. NAND gate
  3. NOR gate
  4. AND gate
Ques. 10JEE Main 2024, 1 February (Morning Shift)

In the given circuit if the power rating of Zener diode is 10 mW, the value of series resistance Rs to regulate the input unregulated supply is : [figure]

  1. 10 k
  2. 10
  3. 1 k
  4. 37 k < Rs < 35 k
Ques. 11JEE Main 2024, 1 February (Evening Shift)

Conductivity of a photodiode starts changing only if the wavelength of incident light is less than 660 nm. The band gap of photodiode is found to be ( X8 )eV. The value of X is : (Given, h=6.6 10-34 Js, e=1.6 10-19 C)

  1. 11
  2. 13
  3. 15
  4. 21

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