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Semiconductor Electronics

NEET (UG) 2026MCQMedium📈 Topic in 50% papers+4−1
Ques. 1NEET (UG) 2026

In the circuit shown below, the voltage appearing across the diode D will be of the form : [figure]

  1. [figure]
  2. [figure]
  3. [figure]
  4. [figure]

Answer

(4) [figure]

Solution

The cathode (bar) of D is towards the upper terminal of the source and its anode is towards R.

Positive half cycle: upper terminal at higher potential ⇒ D is reverse biased (open circuit) ⇒ no current, so the whole input appears across D: vD = vi

Negative half cycle: D is forward biased (ideal, short circuit) ⇒ vD = 0 and the input appears across R.

vD shows the positive half cycle followed by zero in the negative half cycle.

Answer: (4)

Keep practising — Semiconductor Electronics

Ques. 2NEET (UG) 2026

The current I in the circuit shown below is : (All diodes are ideal and identical) [figure]

  1. 13 A
  2. 152 A
  3. 53 A
  4. 59 A
Ques. 3RE-NEET (UG) 2026

An ideal Zener diode with breakdown voltage of -3 V is reverse biased with a negative input voltage Vi = -5 V. The magnitude of voltage difference between point B and A is: [figure]

  1. 0 V
  2. 3 V
  3. 2 V
  4. 1 V
Ques. 4RE-NEET (UG) 2026

Three identical p-n junction diodes D1, D2, and D3 are connected across a battery as shown in the figure. If the width of the depletion regions of D1, D2 and D3 are W1, W2 and W3, respectively, then the correct option is: [figure]

  1. W2 > W1 = W3
  2. W1 > W2 > W3
  3. W3 = W1 > W2
  4. W3 > W2 > W1
Ques. 5NEET (UG) 2025

A full wave rectifier circuit with diodes (D1) and (D2) is shown in the figure. If input supply voltage Vin = 220 (100 t) volt, then at t = 15 msec [figure]

  1. D1 and D2 both are forward biased
  2. D1 and D2 both are reverse biased
  3. D1 is forward biased, D2 is reverse biased
  4. D1 is reverse biased, D2 is forward biased.
Ques. 6NEET (UG) 2025

The output (Y) of the given logic implementation is similar to the output of an/a gate. [figure]

  1. OR
  2. NOR
  3. AND
  4. NAND
Ques. 7NEET (UG) 2024

A logic circuit provides the output Y as per the following truth table : [figure] The expression of the output Y is :

  1. A B + A
  2. A B + A
  3. B
  4. B
Ques. 8NEET (UG) 2024

Consider the following statements A and B and identify the correct answer : [figure]

  1. A is correct but B is incorrect
  2. A is incorrect but B is correct
  3. Both A and B are correct
  4. Both A and B are incorrect
Ques. 9NEET (UG) 2024

The output (Y) of the given logic gate is similar to the output of an/a [figure]

  1. NAND gate
  2. NOR gate
  3. OR gate
  4. AND gate
Ques. 10RE-NEET (UG) 2024

[figure] The I-V characteristics shown above are exhibited by a

  1. Light emitting diode
  2. Zener diode
  3. Photodiode
  4. Solar cell
Ques. 11RE-NEET (UG) 2024

When the output of an OR gate is applied as input to a NOT gate, then the combination acts as a

  1. NAND gate
  2. NOR gate
  3. AND gate
  4. OR gate

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